Trying to work with LTC2123. We are using JESD204B Subclass 0. Test patterns like K28.5, K28.7, D21.5, Lane Alignment Sequence, Modified RPAT Pattern are work fine. But normal data is terrible. To test LTC2123 we applied triangular wave to the input, but it looks like ADC has only 4 bits in the whole range. Time domain diagram on image bellow. This is true both for 5Gbps (2 lanes) and 2.5Gbps (4 lanes) modes, no dependency on number of frames per multiframe.