AD9645 AD9655 DC cross talk

Hi mizzi ,

Could you provide us with your captures of the DC cross talk, as well as your circuit configuration, for further analysis on our part?

The data sheet does not include DC crosstalk specifications, as the device was evaluated only for AC crosstalk at 70MHz. Testing was performed by driving one channel while leaving the other channel open and observing the resulting AC crosstalk effects on the adjacent channel.

See references for more discussion.
AN-835: Understanding High Speed ADC Testing and Evaluation | Analog Devices
Crosstalkin’ Converters | Analog Devices

Hi JEstrella 

the input stage of out ADC consists of a ADA4930 with 100 Ohm inputs and on both sides a n offset given by a DAC AD5672. 

Vocm is supplied from the ADC. An anti alias filter with 100MHz 18db/octave is attached behind the  the OPamp. 

we have also tested the board with a direct connection of the ADC inputs to external pulse generators (including the correct OCM offset). 

the ADC has the following schematics 

blocking (of AVDD DRVDD and Vref) according to the data sheet with low ESR. 

Various blocking options 100nF 1uF and both to Vref has been tested without any change.  

The input signal on channel1 (100kHz square from an external Pulse generator) to one channel was measured as shown below. 

note:

1.) for an AD9645 we  are using 16bit values  

2.) x-axis is in samples (12500 samples are one period) amplitude ~ 32k LSB (0.5 FS)

The cross talk on channel 0 looks like the signal below!  

cross talk is around 80/32500 = 0.25% and has reverse polarity!  

This is the worst channel of the four ADCs on the board. The cross talk of the other ADCs are around 0.05-0.15%

Note: not all ADC have the same cross talk from channel 0->1 and 1->0  sometimes it changes slightly by 20%

I have also measured cross talk with a 70 MHz (sinus) but with different method as described in AN-835 and this gives quite the same results.

signal channel 1 with signal amp ~ 32k: 

cross talk channel 0 is: 

I do not really know what is described in AN-835! can you provide a more detailed info what was measured for the AD9645?

Thanks for your help 

can you measure the DC cross talk with your test board? 

Thomas 

The AC crosstalk specified in the datasheet refers to adjacent-channel crosstalk, where one channel is driven while the adjacent channel is left open. The crosstalk is determined by observing the spur that appears in the channel left open at the same frequency as the signal applied to the driven channel. The adjacent-channel AC crosstalk was measured using the following two methods:

Method 1: Driving one channel near full scale

• One channel was driven with a signal at approximately -1dBFS
• Leave the other channel open.
• The resulting crosstalk was measured by observing the spur at the same frequency as the applied input signal in the channel that was left open.

Method 2: Driving one channel 3dB above full scale

• One channel was driven with a signal at approximately 3dBFS
• Leave the other channel open
• The resulting crosstalk was measured by observing the spur at the same frequency as the applied input signal in the channel that was left open.

Example:

Note: Crosstalk is measured at 69.5 MHz with -1.0dBFS analog input on one channel and no input on the adjacent channel.

Crosstalk can originate from several sources, including power supply coupling, coupling between signal paths on a PCB, or coupling between channels within the IC itself.

Reference: Crosstalkin’ Converters | Analog Devices

Hello,

With regard to application note, I would take issue with the notion that the "victim channel" be left open when making the measurement.   Instead, the "victim channel" ADC input should maintain the same impedance as the "aggressor channel" ADC for a fair comparison. The reason is that increasing the impedance of the "victim channel" will increase the amount of coupling from an "aggressor channel" that remains at the lower impedance

I would recommend following for debug.
1)  Determine if coupling is from within the ADC or external to the ADC.   
Disconnect differential  outputs of ADA4930-1 and connect series 18 ohm resistors to each other and then tie to VOCMA (after the 10 ohm resistor).   Note that since ADA4930-1 has very low output impedance, shorting the two inputs into differential 3rd order LPF maintains similar impedance.
-Redo measurement and see if any change takes place.

2) Both the ADA4930-1's VOCM output impedance is quite high at 8.4 kohm and is meant to be overdriven from a low source impedance buffer should it need to be set to something different than the (3/10)*(+VS - -VS) nominal level.   The AD9645 datasheet does not provide any information on its VCM voltage output but it is likely high also.   Ideally a low impedance buffer should be driving the amplifiers VOCM input to keep the impedance low so as to maintain proper common-mode voltage of 0.9 V.

How does VOCM_A in the schematic connect to ADC's VCM input?   Ideally the ADC's VCM input should have a 0.1 uF capacitor as close as possible pin as possible 

Note that if a resistor is connecting a VOCM_A to ADC's VCM input...............try removing it and see if it impacts the coupling.   Note that if amplifier is operating at 3.3 V, it should be producing a 1 V  output common-mode which is well within the ADC's input common-mode range.   That said...................a full-scale differential output of 2 Vpp results in 1 Vpp out of each amplifier output such it swings from 0.5 to 1.5 V......which is still within linear operating range of amplfier's output.  

Thank you for help 

we have tried to connect both inputs of the cross talk channel to the Vocm of the ADC as you have described in your sketch ( but we have removed the 18 Ohm resistor to connect the wires). This has  not decreased the cross talk at all.Do you think the 18 Ohm resistor is necessary? 

Also supplying the input of the ADC with a external pulse generator with the correct OCM voltage has not changed the cross talk.  

I have not seen that the OCM input of the AD4930 is also supplying an output voltage with 3/10 of the supply voltage this should be 3.33V*0.3=1V. with our setup we measure 0.9V. thus it seems the ADC is driving the pin correctly.   thanks for that hint. 

the Vocm of the AD4930 is driven directly by the 10 ohm resistor blocked  by C165 (1uF), but we never blocked the Vocm from  the ADC directly at the ADC correctly with 100nF. Thanks for that hint.  

we will try this within of the next days. I will then come back to you! 

If you have a eval board can you connect a square pulse and measure the crosstalk  (10us square length is ok)?  because the eval board is AC coupled you should see an exponential tail pulse, with a high pass of around 1 MHz. nevertheless this should give us a hint for the DC cross talk as measured by us. 

I was wondering about the measurement of JEstrella for the AD9655. the crosstalk yields around -88db (-89dbFS - -1dbFS) . this is around 20db higher than specified in the datasheet (-107db). and very close to the cross talk of some good channels on our ad9655 board.  Any explanation for that?

Thanks

Thomas  

According to the datasheet, a less dense board was used during crosstalk testing to accurately characterize the AD9655's crosstalk performance. 

Hi JEstrella,

You showed a plot from 8/4/26 demonstrating the crosstalk measurement with a crosstalk of -88dbFS.
I assume this was measured using the eval board? The application note AN-835 shows pictures of eval boards. You're saying the crosstalk measurement from the datasheet was taken with a different board? 

Is there any information about the less dense board? 

we can in principle completely isolate the ADC on our board! 

would be nice to get this information! 

Hi, 

we have now checked again our schematics! The Vcm of the ADC was correctly blocked 

The VCM is fed via the 10Ohm resistor and a 1uF blocking C into the AD4930  

Thus the test you described we have done previously without any effect. 

Also we have tried to remove the 10 Ohm resistor and use the 1V internal Vocm from the AD4930. Also without any effect.

Because now no direct connection between the channels is made on the test board and all blocking is made the same way as described in the data sheet i assume the cross talk is given by the ADC itself. 

Especially because the cross talk depends strongly on the temperature of the ADC only, I assume the cross talk is made by the ADC itself and the ADC does not fulfill the specs of the data sheet.  Also the fact that not all ADCs are the same way bad seems to be an indication that some specs are not OK. 

Our board with the AD9655 (same board as for the AD9645, but different chips soldered) behaves the same way but channel which are good on the AD9645 are bad on the AD9655. 

Does anybody know how the cross talk was measured for the measurement of the data sheet? 

"A simplified board was used" is not really helpful. 

Do you have an Eval board? 

Thanks Thomas  

one more information !

we have also replaced the 10Ohm resistor to 200Ohm .... no effect! 

one more information !

we have also replaced the 10Ohm resistor to 200Ohm .... no effect! 

`Hello,

Your point about exponential tail is a good point in that most common form of crosstalk is either capacitive or inductive due to poor board layout with degradation happening at higher frequencies .  In your case,  it appears to near DC (i.e. 100 KHz square wave) and perhaps DC.

Perhaps you can investigate the actual DC crosstalk by injecting near +FS and -FS value into front end of ADA4310 and measure values on both ADC's to see if similar crosstalk results are observed.  If indeed crosstalk results remain similar than one can concentrated on possible DC paths.

HI 

out board is DC coupled i can measure cross talk from DC up to any frequency. 

my comment about the exponential refers to  the eval board which is AC coupled via baluns and C. 

Nevertheless AC coupled systems can be measured down to DC  if they have one major low pass only. 

connect a  square pulse to the eval board and measure the response which should be an exponential tail signal. compare the pulse height of the signal and the cross talk path and you can estimate the DC cross talk. 

if you can do that (or JEstrella)  it would be very nice! 

Tomorrow i will test some other ideas i have. i will let you know what are the results. 
But the most interesting info for me would be how the simplified board which measures -104db  looks like. i assume i can do the same with our board and verify the chip specs are OK! do you think it is possible to get this information? 

Our application is extremely sensitive to cross talk. therefor the ADC will be not usable if we can not reach the -80db mark. 

Hello,

I agree with your suspicions that the coupling is pointing to the ADC itself.   The reason I suggested DC is that it should completely eliminate possibility of AC coupling (i.e. coupling via high pass filter with cut-off of 10 KHz where a 100KHz square wave would not be visibly affected.....especially with high noise floor riding on flat portion of signal). 

I would also suggest shorting the victim channels ADC input at the device inputs themselves and tying shorted inputs to ADC's VCM.  This will ensure no possibility of  AC coupling via PCB traces........again just to rule out any remote possibility that issue is outside of ADC.  Note..........only need to do this on one of the ADC's that will be called the "debug" ADC" since same inter channel crosstalk issue occurs on the other 3 ADC's.

If DC  crosstalk issue results remain similar to AC case..........then focus of debug can move entirely to ADC (which we are already suspecting).   

Hello,

Not sure if I agree with your comment "Nevertheless AC coupled systems can be measured down to DC  if they have one major low pass only".    AC coupled systems by definition can not pass DC so for a aggressor square wave on one channel to appear on an adjacent victim channel  without exhibiting exponential tail,  the fundamental frequency (i.e. 100 KHz )should appear 10x above cut-off frequency such that minimum attenuation and phase shift occurs as it passes through the AC coupled portion of circuitry.   

The ADI EVB does not allow for DC coupling considering it uses baluns with blocking capacitors in passive case or blocking caps in the amplifier case.   Note that JEstrella can sweep a Signal Generator with low frequency capability to determine where the  -3 dB point of the high pass response exists on the EVB and then inject square waves that are 10x above and below this point to show difference in response as measured on the aggressor channel (so response is not obscured by attenuated signal with noise riding on flat portion as would be case on victim channel).
Also suggest the JEstrella repeat datasheet 70 MHz sinewave crosstalk test (using FFT's to measure fundamental tone) on ADI EVB to see if datasheet specification can indeed be met

Anyways, the "true" DC crosstalk (with shorted inputs of victim) test I proposed earlier can only be achieved on your development board since it indeed does not have any capacitors or baluns in the signal path.   Performing this test and looking to see if results differ from your previous  square wave results "may" provide a clue on possible cause.

 

Hi 

i found the bug! 

behind  our AAF there was no 33 Ohm resistor and this resistor is absolute mandatory for low cross talk applications! It seem there is a kick back into some ADC internal structures if there flows current into our 68pF block C before the ADC. 

adding this 33 Ohm we get DC cross talk of about 90-96db (more than two magnitudes better) and there is no temperature dependency! 

Thus the problem seems to be solved and i can continue to measure the INL curves. 

thanks for your help  

Glad that you resolved your problem and are getting much better results.

If you are doing another PCB rev to accommodate series 33 ohm resistors, you may also want to consider adding provisions to divide the 68 pF differential filter capacitor into to two single-ended 136 pF (or closest value) to AGND while keeping differential capacitor.  In theory, these two caps will "shunt" the high frequency ADC "kick back" to AGND perhaps improving results (i.e. crosstalk over frequency) even more.   Anyways.......just a  suggestion worth considering.

**FYI.......one could also try it on existing board by soldering caps to 33 ohm resistors with other terminal caps soldered to each other which in turn are soldered to AGND (perhaps ground plane on solder mask level) .

Yes indeed the final board will get more options. currently it's a bit hard to do this... No ground pad nearby the 68pF and the 33 Ohm.

More interesting for me is that some channels on the AD9645 have a DC cross talk of more than 115db. Some other are between 90 and 96db. In principle it seems the ADC is sometimes much better than the spec says (97db). Do you think this can be improved by adding 50-100 Ohm in front instead of the 33 Ohm? 100 Ohm should meet our bandwidth demands if the ADC has 3.5 pF input capacitance.

Are you interested in INL curves? they look also much better now. But they are very different between different ADCs.  

Hello,

You may get more consistent readings if perform test with a -1 dBFS full-scale CW tone on the aggressor channel (that you can also frequency sweep) while also adding a fixed CW tone  on the order of -6 dBFS to the victim channel.   By adding the additional larger CW tone, you are forcing the victim channels ADC to use a much larger  of its input span thus distributing (or averaging) the DNL errors.  Essentially one is adding "dither" to extend the usable SFDR range such that the low-level cross-talk signal can have a more accurate and stable reading when measuring its power level using an averaged FFT.  Anyways..........just a thought to see if crosstalk results are more stable between ADC's.

Using method above to get more stable reading, perhaps it is worth trying albeit I do not think it will result 3x improvement  by tripling resistor value.

INL curves will differ between ADC's albeit they should still all exhibit a similar "saw tooth" pattern that is a result of the ADC's pipeline architecture.  For this particular ADC, it appears that the 1st stage consists of a 4-bits since pattern looks like 16 tooths.