Hello ADI Support Team,
We are currently evaluating the AD9643 using the HSC-ADC-EVALCZ evaluation board. Our primary goal is to capture data using a custom Python script that directly calls the provided .dll, rather than relying on the VisualAnalog GUI. We are now preparing to test the external trigger functionality within this Python-based setup.
To ensure we do not accidentally damage the evaluation boards, we are holding off on the hardware setup until we can confirm the exact specifications. Could you please advise on the following three points?
1. Software Configuration (via Python / .dll): When controlling the board programmatically via Python and the .dll, how should we configure and enable the external trigger? Are there specific DLL API functions or SPI register writes required? Additionally, do we need to load a specific custom FPGA .bin file for this external trigger operation?
2. Hardware Specifications: What are the required voltage levels (e.g., 2.5V CMOS?) and the trigger edge (rising or falling) for the hardware trigger input (SMA1 / J7)?
3. System Behavior: While waiting for the external trigger, is the data transmission from the FPGA board to the PC blocked? Or does the FPGA output empty data (e.g., zeros) or repeat the previous data from its FIFO?
Thank you in advance for your support.
