Hi ADI Applications Team,
I am currently working with the AD9213 and would like to clarify and verify the behavior of the TRIG_x signal.
1. TRIG_x functionality
Is TRIG_x capable of controlling the ADC sampling start point or resetting the ADC data pipeline for a single device, similar to a traditional triggered ADC behavior?
Or is TRIG_x intended only for internal digital functions, such as:
-
NCO synchronization
-
DDC frequency hopping
-
Multichip synchronization in conjunction with SYSREF_x
We would like to confirm whether TRIG_x has any direct impact on the ADC sampling process itself, or if ADC sampling is entirely determined by the encode clock.
2. Register configuration for TRIG_x verification
Could you please advise on the recommended register settings and verification procedure to confirm that TRIG_x is functioning correctly for a single device?
For example, observing NCO frequency hop or phase discontinuity at the DDC output.
3. FPGA reference design support
We have purchased the following evaluation boards:
-
AD9213-10GEBZ-B
-
ADS8-V1EBZ
Is it possible to share us to the FPGA reference design code used with this platform?
We have reviewed the following resource:
https://wiki.analog.com/ad9213_ce
Any additional reference designs, example projects, or internal documentation would be greatly appreciated.
Thank you very much for your support.