CML (Current-Mode Logic) clock for AD9695

Hi OHBsystemag 

Thanks for your interest in AD9695.

1. CML can be used, but proper termination and biasing are required to meet the AD9695 input specifications (similar to LVPECL). The apparent contradiction isn’t actually one: Table 4 lists the officially supported standards, while the figure illustrates the input structure, which can accommodate other differential types if correctly adapted. When using CML, ensure the input common-mode voltage and swing are within specification.
2. For one-shot or continuous SYSREF, DC coupling is recommended when the driver and receiver share compatible voltage levels (e.g., LVPECL or LVDS at the same I/O voltage). If levels differ, AC coupling is acceptable but note that AC coupling introduces a high-pass filter.

Please note that I’m not the official product owner, and these are just my comments. Kindly give some time for the product owner (s.ilke ) to look into this and provide their response.

Hi OHBsystemag 

Thanks for your interest in AD9695.

1. CML can be used, but proper termination and biasing are required to meet the AD9695 input specifications (similar to LVPECL). The apparent contradiction isn’t actually one: Table 4 lists the officially supported standards, while the figure illustrates the input structure, which can accommodate other differential types if correctly adapted. When using CML, ensure the input common-mode voltage and swing are within specification.
2. For one-shot or continuous SYSREF, DC coupling is recommended when the driver and receiver share compatible voltage levels (e.g., LVPECL or LVDS at the same I/O voltage). If levels differ, AC coupling is acceptable but note that AC coupling introduces a high-pass filter.

Please note that I’m not the official product owner, and these are just my comments. Kindly give some time for the product owner (s.ilke ) to look into this and provide their response.