Hello,
We are using AD9251 dual 14-bit ADC and currently validating its "output test modes" as described in AN-877.
However, the digital outputs do not match the patterns described in the documentation.
When selecting test modes such as +FS short, –FS short, checkerboard, and others, the bit patterns on the digital output pins do not align with the patterns defined in AN-877.
Observed behavior:
- D0A, D1A, D0B, and D1B always remain at logic ‘0’ (verified on DSO), even in modes (+FS short) where these bits should be ‘1’.
- Whereas digital output pins other than above mentioned are behaving as correctly.
- Voltage measured across D0A, D1A, D0B and D1B in standalone board is found to be always 0 and Voltage measured across other output pins was up to 2V.
Debugging already performed:
- SPI write/read verified – registers are correctly configured for output test modes
- Output mode register (0x14) checked for offset-binary
- Encode clock present and stable.
Could you please advise what could cause only the LSBs (D0/D1) of both channels to remain low in all test modes, and whether additional configuration or hardware considerations are required for these pins?
Thank you.
Edit Notes
Clarified observed behavior section[edited by: Devansh at 2:04 PM (GMT -5) on 20 Nov 2025]







