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clock excursion range 0.8v or 3.3v?

Category: Datasheet/Specs
Product Number: AD8285

AD8285 ADC datasheet told how to apply clock to CLK pins differentially or in single ended manner well.
Datasheet told excursion must not exceed 0.8V peak to peak here:

But also it had apply 3.3v voltage to it directly. As you can see here:


How this can be justified?
Somewhere else in datasheet it tells though it is 1.8v operating logic but it designed to work with 3.3v. Here I am curious why it included the Schottky in diff mode and told we want to limit excursion to 0.8v. It seems it must be waste of resources!!!

Edit Notes

More explaining about ambiguity.
[edited by: mohammadsdtmnd at 9:18 PM (GMT -4) on 24 Sep 2025]
Parents
  • Hi  

    Thank for using AD8285.

    Kindly give some time for the product owner ( ) to look into this and provide their response.

    In the meantime, please note that back-to-back Schottky diodes in transformer-coupled differential clock inputs are not unnecessary—they play a critical role in protecting the ADC, maintaining signal integrity, and ensuring compatibility with various clock sources.

Reply
  • Hi  

    Thank for using AD8285.

    Kindly give some time for the product owner ( ) to look into this and provide their response.

    In the meantime, please note that back-to-back Schottky diodes in transformer-coupled differential clock inputs are not unnecessary—they play a critical role in protecting the ADC, maintaining signal integrity, and ensuring compatibility with various clock sources.

Children