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AD6641 Recommended for New Designs
The AD6641 is a 250 MHz bandwidth digital predistortion (DPD) observation receiver that integrates a 12-bit 500 MSPS ADC, a 16k × 12 FIFO, and a multimode...
AD6641 on Analog.com

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Continuous Mode Data Streaming

		
	
				

			

									
					    TomerWIS
					
							

            
            			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Sep 16, 2025 
				
			
			
		
    
		
		                    	    
    
        	    
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                The user is trying to achieve continuous data output from the AD6641 ADC using the parallel interface. The AD6641 does not support true continuous streaming; instead, it uses a FIFO buffer that requires repeated triggering to simulate continuous output. The FILL_COUNT register controls the number of samples, and the DUMP signal initiates the data transfer.
                        	    
    
                
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    Product Number:  AD6641  
    
    		        		    		    
    
		    		    
		    			
    
			    
    Hello all.
    

    I am using the AD6641 ADC on my custom PCB. Using the parallel interface, I am sending the FIFO data into my FPGA, where I view it in my ILA.
    My goal is to get a continuous output from the ADC, so I could filter noises from the input signal of the ADC, and use it for my system.
    

    is it possible to get my input signal sent through the parallel continuously? when I put my ADC in continuous mode, and trigger the parallel interface dump, using the fill signal, it sends a finite set of samples, defined by the FILL_COUNT register. 
    

      
    

    

    By now I start to think that reading live data continuously through the parallel interface is not possible. 
    If there is a way to do so, please share this information with me.
    

    Thank you in advance, Tomer
    
			
    
			
									
		                             
                        

    
    
                                            
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      •  Analog Employees  
      
            
						
                            
            
            				
            
                on Sep 17, 2025 2:33 AM
            
            
						
			                            
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      Hi  
      

      Thanks for using AD6641.
      

      The AD6641 does not support true continuous streaming via the parallel interface. Instead, it uses a FIFO buffer that captures a finite number of samples, controlled by the FILL_COUNT register. Even in continuous capture mode, data is stored in the FIFO and only sent out when triggered with DUMP signal, after which the data is dumped—so it's not live streaming. To simulate continuous output, you’d need to repeatedly trigger FIFO dumps and manage timing in your FPGA.
      

      For reference, see: Parallel Leader Mode Theory of Operation in the AD6641 datasheet, page 25 and Parallel Mode Transaction Diagram (Figure 40):
      

       
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
						
						
				
				
		
		
      
			
		
      
	
      

      

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                on Sep 17, 2025 3:42 AM
            
            
												
						in reply to JAlipio
					
										
			            		
        
		
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        As I suspected. Thank you very much for the quick and useful answer.
        
			
        

		
			
	      

		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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