Hi Team,
If the encode clock pulse is of 200MHz (5ns pulse) to set the conversion rate of 200MSPS then how the valid time and output propagation delay can be met as per the datasheet.
For 100MHz the data valid time is 4.8ns as per the datasheet, what would be the calculation for 200MHz to calculate output valid time.
Regards,
Muhammed Esa
Hi Esa2024
Apologies for the confusion.
In Dual Port Mode at 200 MSPS, using the typical values for the AD9054ABST-200.
Hi Esa2024
Apologies for the confusion.
In Dual Port Mode at 200 MSPS, using the typical values for the AD9054ABST-200.
Hi JAlipio,
Kindly confirm whether my understanding is correct.
I believe (if we take typical tpd and tv for 200MSPS) each data is seen after 5.9ns of delay from the actual rising edge of the clock (encode) after the 5-clock pipeline delay, in that case the data N is seen at 0.9ns after the rising edge of 7th clock and valid 0.1ns after the rising edge of the 9th clock.
On Port-A Nth sample is available in 30.9ns (25ns for 5 clock pipeline delay + from 6th clock 5.9ns tpd ) and valid till 40.1ns (considering 9.2ns tv).
On Port-B N+1 sample is at 35.9ns and valid till 45.1ns.
Regards,
Muhammed Esa A
