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Unexpected Random Output in ADC Test Mode (Expecting 0 and -1 Toggle, Getting Random Bits)

Thread Summary

The user is experiencing unexpected random signed bit values and noisy data when testing the AD9258 ADC in test mode using bare metal code, despite adjusting the DCO delay register. The final answer indicates that this issue has been previously addressed in a duplicate thread, suggesting the user refer to the discussion for a solution.
AI Generated Content
Category: Hardware
Product Number: AD9258

Hi support team,

We developed AD9258 ADC custom board for some project application to capture I and Q sample. we are testing an AD9258 ADC in test mode operation using bare metal code, with test pattern output toggle between 0 and -1. we are capturing output in ILA, we observed that after more iteration of data capturing in ILA random signed bit values like 385, 656, -385 etc. instead of the expected 0 and -1 values. we also changed the DCO (Data Clock Output) delay register setting to adjust the clock delay. but still we are not getting constant 0 and -1 pattern.

please find below screenshot of output data capture in ILA.

Above screenshot shows the 0 and -1 test pattern in AD9258 ADC test mode operation

After multiple time of iteration we are getting random values and sone noisy data as shown in below attached screenshot

 

       

Please provide some solution on that, this is urgent requirement for our project. 

Thanks and regards