HMC7044
Recommended for New Designs
The HMC7044 is a high performance, dual-loop, integer-N jitter attenuator capable of performing reference selection and generation of ultralow phase noise...
Datasheet
HMC7044 on Analog.com
AD9689
Recommended for New Designs
The AD9689 is a dual, 14-bit, 2.0 GSPS/2.6 GSPS analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed...
Datasheet
AD9689 on Analog.com
Hi,
My currunt setup includes AD9689-2000EBZ for ADC and HMC7044 Evaluation Board.
For FPGA I am using Gowin Arora 5AT.
Settings I require right now are L=2, M= 1, N'= 8, F=1, Full Bandwidth mode. The Adc sample clock I require is 1.2Ghz and then lane rate would be 6GHz.
This issue is that there is a single ended connector soldered on the adc evaluation board and HMC7044 cannot produce required clock if output driver is CMOS. So, I am not getting a lock on PLL
If I input 600Mhz on either encode clock or Sysref I get lock on the PLL, First of all why is that ?
Secondly, correct me if I am wrong that encode clock is equal to adc sample clock if decimation ratio is 1 ?
As, this adc works on this high speed clk so the differential input connectors should be populated on the board by default.
Thank you.
Hi Arsalan
Thanks for using AD9689.
If I input 600Mhz on either encode clock or Sysref I get lock on the PLL, First of all why is that ?
Please create a thread at Clock and Timing for HMC7044 queries.
Secondly, correct me if I am wrong that encode clock is equal to adc sample clock if decimation ratio is 1 ?
You are correct. If the decimation ratio is 1, the encode clock is indeed equal to the ADC sample clock. This means that for your setup, with a 1.2GHz sample clock, the encode clock should also be 1.2GHz.
As, this adc works on this high speed clk so the differential input connectors should be populated on the board by default.
The eval board is designed to accept low jitter external clock which usually have a single-ended output. However, it has also a path for a differential input. You just need to modify the board by installing 0.1uF at C1 and C2 or transfer the 0.1uF from C204/C205 to C1/C2 and install SMA connector at J1 and J2.
See also CLOCK INPUT CONSIDERATIONS at page 32... of the datasheet.
