AD9251 noise

Hi oldcong 

Thanks for using AD9251.

Here are a few things you can check:

• Ensure that the VCM voltage is correctly set. According to the AD9251 datasheet, the VCM should be set to AVDD/2.
• Ensure that your power supply is stable and well-filtered. The peak-to-peak voltage (Vp-p) of AVDD and DRVDD being 15mV might indicate noise on the power supply lines.
• Verify that the input configuration matches the recommended setup in the datasheet. For example, using a differential double balun input configuration can help maintain the correct common mode voltage.
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• Add a capacitor/s on the VCM and VREF pin. The VREF pin should be externally decoupled to ground with a low ESR, 1.0 μF capacitor in parallel with a low ESR, 0.1 μF ceramic capacitor and the VCM pin should be decoupled to ground with a 0.1 μF capacitor.
  • 

Hi JAlipio

Thank you for your reply.

Here is my clock circuit . I use a LVDS clock to drive a AD9513 , the output of AD9513 drive AD9251.

Other circuits are same with your reply. I should do something to reduce power noise.

Hello,

The datasheet provides grounded histogram plot as shown below which represents the thermal noise contribution from the ADC core when its inputs are essentially shorted to each other.  Since the 14-bit ADC's SNR is slightly better than 74 dBFS (i.e. 74.5 dBFS), its noise floor is about equal to a 12-bit ideal ADC where its thermal noise dominates since no signal is present (hence jitter from clock is not an issue for this test).   The histogram below should that the distribution has about 1.1 LSB RMS noise since the SNR under low-signal conditions of the ADC is around 74.5 dBFS.



In your shown circuit........suggest that you short the inputs of your VINA and VINB as shown below to determine if your recorded histogram has similar RMS value.  If it does............eliminate short and reconnect as normal to see how much degradation occurs.

Thank you very much.