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AD9681 Recommended for New Designs
The AD9681 is an octal, 14-bit, 125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit that is designed for low cost, low power...
Datasheet
AD9681 on Analog.com

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LVDS Data and clock maximum length on PCB

		
	
				

			

									
					    GovindAlagan
					
							

            
            			
				
									
											
			
			
				
			
			
			    	
			                    
                
				                on Jan 1, 2025 
				
			
			
		

		
		                     
				
        		

		    
		    		    

		      		            		        
Category: Hardware

    		        		            		    
Product Number:  AD9681  

    		        		    		    

		    		    
		    			

			    
Hi,


We are AD9681 ADC in our design for DAQ voltage and current measurement purposes. It is interfaced with Ultrascale FPGA. We are running the ADC at 50 Msps speed.


Here are the questions:


1. What is the maximum PCB trace length should be allowed on the data lane and DCO clock between the ADC and FPGA? It is not mentioned in the Application note / Datasheet. Is there any absolute max length limit on the trace length? 


2. Currently, our board has a 240 mm trace running between ADC and FPGA on data and clock traces. Its length is matched within 1mm. Is there any potential impact on 240 mm ? 


3. Are there any settings that will help if the trace length is higher? or driver strength? 







			

			
									
		                             
                        

    

                                            
                 hardware
                
                                                    
                 High Speed A/D Converters >10 MSPS
                
                                                    
                 ad9681
                
                                                    
                 Standard High Speed A/D Converters
                
                                
            

    
    
		


				
				        
        		

			
						
									
												
			
			
                        
                                    
                        
                        
                        
            
			            
						
						
			
			
			
			
		


        
        
        
    
					

			





















	

	

					



			








	
	
	
	



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    •  Analog Employees  
    •  Super User  
    
            
						
                            
            
            				
            
                on Jan 3, 2025 6:01 AM
            
            
						
			            		
    
		
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    Hi  
    

    Thanks for using AD9681.
    

    It is generally recommended to keep the trace lengths as short as possible to minimize signal attenuation, increased jitter, and timing mismatches. For high-speed signals, trace lengths longer than 150 mm (6 inches) can start to introduce significant signal integrity problems.
    

    To mitigate the impact of longer trace lengths, you can adjust the driver strength settings on the ADC through register address 0x15.
    

     
    

    Also, kindly do take note of the following:
    

     
    

     
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
						
						
				
				
		
		
    
			
		
    
	
    

    

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  • 
	
    



	
			
		
	



    
	
    
		
    
							
					
    
		
    
		    
		    		    
			
				
									
							        
			
			
			
    •  Analog Employees  
    •  Super User  
    
            
						
                            
            
            				
            
                on Jan 3, 2025 6:01 AM
            
            
						
			            		
    
		
										+1
					
	
    

		
		
    
		
    
                                
                                                            
    
					
    Hi  
    

    Thanks for using AD9681.
    

    It is generally recommended to keep the trace lengths as short as possible to minimize signal attenuation, increased jitter, and timing mismatches. For high-speed signals, trace lengths longer than 150 mm (6 inches) can start to introduce significant signal integrity problems.
    

    To mitigate the impact of longer trace lengths, you can adjust the driver strength settings on the ADC through register address 0x15.
    

     
    

    Also, kindly do take note of the following:
    

     
    

     
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
						
						
				
				
		
		
    
			
		
    
	
    

    

    • 





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