Category: Hardware
Hello,
I've working with the AD9269 for several applications which require different operation modes of the two available for this ADC.
In one of our applications we require using the interleaved mode (Figure 3 of the datasheet). Looking at the diagram (Figure 3) I'm assuming that the output data CHA is presented at the DCOA rising edge and the CHB data is at falling edge, hence data are sent in DDR fashion for the whole output parallel bus, could you please confirm whether my understanding is correct?
(Apologies if this has been answered before, but I could not find the answer for this specific ADC in the forum)
Thanks
Best regards
Jose