Common mode voltage for AD9467

Hi AD9467 

Thanks for your interest in AD9467.

The common-mode voltage refers to the DC bias of the VIN+ and VIN−.

For best dynamic performance, the source impedances driving VIN+ and VIN− should be matched such that common-mode settling errors are symmetrical.

I have ever used AD7765, a delta sigma ADC with differential input. The common mode voltage is defined as (VIN+ +VIN-)/2. And I can use different DC bias for VIN+&VIN-. And it works. Can you advise why AD9467 use different common mode voltage concept from other delta sigma ADCs----a same DC bias voltage for wither VIN+ or VIN-? 

Thanks

Hi JAlipio,

Any response?

Hi AD9467 

The AD9467 uses internal input common-mode as the default configuration.

But you can also disable the internal input common-mode buffer through register address 0x2C bit 2, allowing a dc-coupled input for which the input common-mode voltage can be set externally. Otherwise, use an ac coupling capacitor in series on each of the analog input for ac coupling.

Also note that the SNR and SFDR performance of the ADC depends on the analog input common-mode voltage.

Hi JAlipio,

Thank you very much for your reply.

I would like to turn off the internal CMN because my analog input voltage is only with positive voltage. If using the same CMN, the differential input range will be halfed and the resolution is lost.

Thank you for your reminding the CMN vs. SFDR curve.

By using the external CMN, I will use different DC bias(1.44V & 2.88V respectively) for VIN+ and VIN- to achieve the differential input voltage as +/-1.25V. Although they are different, the CMN should be equal to (VIN+ + VIN-)/2=2.15V, which can have best SNR & SFDR. See below for VIN+ & VIN- tansfer function.

Transfer function:

VIN+=1.44+gain*Vinput; VIN-=2.88-gain*Vinput

Pls correct me if I am wrong.

BTW, I do not know how to change my user name "AD9467".

Thanks

John

Hi JAlipio,

My transfer function is based on CMN equal to (VIN+ + VIN-)/2. When using different DC bias, the CMN can still be 2.15V. But if CMN is referred to the DC bias voltage, then per figure 40 of the datasheet, the SNT&SFDR cannot be accepted. Pls confirm me for AD9467 if CMN refers to DC bias voltage or (VIN+ + VIN-)/2.

I checked lots of application note and per these application note, CMN refers to (VIN+ + VIN-)/2, not the DC bias voltage added to VIN+ & VIN-.

Appreciated your reply.

Thanks

John

Hi JAlipio,

Any response?

Hi AD9467 

Please see Designing High Speed Analog Signal Chains From DC-to-Wideband | Analog Devices

Vp and Vn should be complementary signals (e.g. sine wave)

AD9467 said:

I would like to turn off the internal CMN because my analog input voltage is only with positive voltage.

• Does your analog inputs contain DC components?

AD9467 said:

If using the same CMN, the differential input range will be halfed and the resolution is lost.

• Having the same CM for Vp and Vn will results to a differential voltage centered at 0 V as shown in the figure above.

AD9467 said:

By using the external CMN, I will use different DC bias(1.44V & 2.88V respectively) for VIN+ and VIN- to achieve the differential input voltage as +/-1.25V.

• What is the input voltage swing of the VIN+ at 1.44 V DC offset and VIN- at 2.88 V DC offset?

Hi JAlipio,

I mean if I use transfer function as below, I can achieve CMN of 2.15V which satisfy SFDR. Pls confirm.

VIN+=1.44+gain*Vinput; VIN-=2.88-gain*Vinput

Thanks

Hi JAlipio,

I mean if I use transfer function as below, I can achieve CMN of 2.15V which satisfy SFDR. Pls confirm.

VIN+=1.44+gain*Vinput; VIN-=2.88-gain*Vinput

Thanks

Using the formula: Vcm = (Vp + Vn) / 2

Vcm = [(1.44 + gain*Vinput) + (2.88 - gain*Vinput)] / 2

Vcm is 2.16, given that the Vinput is a complementary signal and gain is the same for VIN+ and VIN-.

While your differential input will be Vdm = Vp - Vn

Vdm = 1.44 + gain*Vinput - (2.88 - gain*Vinput)

Vdm = -1.44 + 2*gain*Vinput

Also, note that the Differential Input Voltage has a maximum of 2.5 Vpp.

Hi JAlipio,

Therefore, I do not need to worry about the SFDR accordingly.

BTW, the max. VIN+ & VIN- per my transfer function is 2.7V, exceeding VREF but less than 3.6V. Per AD9467 absolute max. rating, VIN+ & VIN- should be in the range of -0.3V~3.6V.

Normally, the single end input voltage to the ADC should not exceed VREF such as those sigma delta ADC. But for AD9467, per its max. absolute rating, I think it should be OK. Pls confirm.

Best regards