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AD9213 DDC Linux driver support

Category: Software
Product Number: AD9213
Software Version: None

Hi,

Looking into the current AD9213 Linux driver and device tree example, i don't see any example for using the internal DDC of the device. Is there a newer driver or some other example that shows of to use the internal DDC?

https://github.com/analogdevicesinc/linux/blob/altera_adxcvr_master/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_ad9213_dual.dts
https://github.com/analogdevicesinc/linux/blob/altera_adxcvr_master/drivers/iio/adc/ad9213.c

Regards,
Christophe

  • Your query is acknowledged. Kindly give time for the product owner ( ) to look into this and provide their response.

  • Hi Christophe,

    Thanks for your interest in AD9213. The links you showed above are applicable to the AD9213-DUAL-EBZ, which does not use the AD9213 DDC (as you have already seen).

    My use of the AD9213 DDC has been by changing the configuration in ACE, which is the evaluation software platform, used along with the ADS8-V1 FPGA board. ACE will issue SPI writes to configure AD9213. I can try to get the SPI sequence that ACE uses to configure the DDC, if that would help.

    There is also a reference design here ( AD9213-EVB HDL reference design [Analog Devices Wiki] ) for AD9213 and VCU118, in case there is something here that might be helpful.

    Thank you.

    Doug

  • Hi Doug,

    Thanks for the feedback.

    I think it would be useful to get the actual SPI sequence for configuring the DDC (including NCO programming) so that we have a reference.

    In our case, we would like to configure the ADC to sample at 10Gsps and decimate by 4. I think this is the wanted configuration with N=16:

    Thanks

    Christophe

  • Hi Christophe,

    Table 83 from the AD9213 datasheet shows the registers which need to be written for complex decimate-by-4.

    I tried an example in ACE using your basic configuration. I arbitrarily chose fNCO = 795MHz and enabled the +6dB gain setting. Here is the SPI sequence from ACE:

    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x606, 0x1);
    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x607, 0x2);
    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x630, 0x2);
    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x631, 0x1);
    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x634, 0x31);
    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x635, 0x08);
    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x636, 0x0AC);
    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x637, 0x1C);
    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x638, 0x5A);
    @Subsystem_1.AD9213-10GEBZ-B.AD9213: Evaluation.Control.WriteRegister(0x639, 0x14);

    Please take care.

    Doug

  • Thanks Doug,

    Could you confirm if the registers MAIN_DATA_INV (0x5EA) and MAIN_DATA_INV2 (0x5EB) applies to the physical serdes lanes or the logical lanes?

    Regards,
    Christophe

  • Hi Doug,

    I updated the kernel driver to program the registers you mentioned. However, as i was not able to get the JESD link up, i started to investigate the AD9213. I decided to manually read/write register using the iio_reg utility and I discovered that the AD9213 is not responding to SPI read transaction. The rest of the devices on the board are ok. The HMC is programmed. The ADF4371 is locking. I am ensure if the AD9213 is working at all on this board. I was looking for some registers to program the GPIO of the AD9213 in output mode to verify if the device was reacting to SPI write but i am not able to find any registers in the datasheet for doing so. Is there a hidden register i can try to program the GPIO as output high or low? Or is there something else I can try to check that the AD9213 is alive before we ship the board for repair?

    Some trace from the FPGA internal SPI bus. When doing a read of address 0x0, the return value is 0:

    When doing a read of address 0x1, the return value is 0xff:

    The data seems to retain the last value placed on the bus by the FPGA. Apart from that, all voltages on the board looked ok. The SPI signals are reaching test point TP2 / TP3 and TP28 on the board.

    Some dump from the console when accessing register using IIO utility:

    root@zu11eg:/home/cc# ./iio_reg ad9213 0
    0x0
    root@zu11eg:/home/cc# ./iio_reg ad9213 1
    0xff
    root@zu11eg:/home/cc# ./iio_reg ad9213 2
    0x0
    root@zu11eg:/home/cc# ./iio_reg ad9213 3
    0xff
    root@zu11eg:/home/cc# ./iio_reg adf4371 124
    0x1

    Thanks for any input!

    Regards,
    Christophe

  • Hi Doug,

    Just to close this issue, swapping eval board fixed the problem so the AD9213 not responding to SPI command was due to a falling board. The new board is up and running with the DDC enable.

    Thanks for your help.

    Regards,
    Christophe

  • Hi Christophe,

    Thank you for staying with this, finding the solution to your issue, and posting your findings.

    And yes, you are correct regarding the lane inversion registers.

    Thank you.

    Doug