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Need Verilog source code to assist us in interfacing a Xilinx UltraScale+ MPSoC to an AD9681.

Category: Hardware
Product Number: AD9681

We've been struggling with porting older designs that interfaced to an AD9635 and an AD9253 that reported to function fine. These older designs used Xilinx Series7 MPSoC (Zynq) and a smallish UltraScale+ MPSoC . This newer design with which we are struggling is using a very large Xilinx UltraScale+ in a very large package. Any assistance would be of tremendous help. 

Mark