AD9681
Recommended for New Designs
The AD9681 is an octal, 14-bit, 125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit that is designed for low cost, low power...
Datasheet
AD9681 on Analog.com
AD9635
Recommended for New Designs
The AD9635 is a dual, 12-bit, 80 MSPS/125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power...
Datasheet
AD9635 on Analog.com
AD9253
Recommended for New Designs
The AD9253 is a quad, 14-bit, 80 MSPS/105 MSPS/125 MSPS
analog-to-digital converter (ADC) with an on-chip sample-and-hold
circuit designed for low cost...
Datasheet
AD9253 on Analog.com
We've been struggling with porting older designs that interfaced to an AD9635 and an AD9253 that reported to function fine. These older designs used Xilinx Series7 MPSoC (Zynq) and a smallish UltraScale+ MPSoC . This newer design with which we are struggling is using a very large Xilinx UltraScale+ in a very large package. Any assistance would be of tremendous help.
Mark
Hi MarkM1234 ,
Thanks for your interest in AD9681.
To proceed with the FPGA source code request, the team will be asking some personal information for verification.
Kindly accept my friendship request.
As requested.
Did I accept this "friendship request" correctly?
-Mark
Hi,
I'm also involved with the Xilinx UltraScale+ reference design for the AD9681. Could you share it with me??