Hello,
I'm having trouble using your AD9288 in terms of input common mode voltage. The (latest) revision of the datasheet I use is RevC.
In my application, supply voltage is 3.3 V. I use a differential amplifier to turn unipolar input voltages into differential voltages as you can see on the schematics.
The thing is, the common mode input voltage roughly is 0.99 V as stated in the datasheet. Moreover I use the embedded reference voltage for both A path and B path.
I can observe that the digital output (when the system is fed by a zero mean CW) is not centered at 0x00 but rather -20 % or so lower, i.e. 0xEB. Therefore my digitized signal are not centered around a digital 0.
Is this an odd phenomenon due to the reference voltage (1.25 V, measured), different from the mean input value (0.99 V, measured) ?
The ADC's outputs feed an FPGA which actually is expecting a 0x00 mean digital value...
Can you help me understanding what is going on ?
Regards,
M. Chante