In the datasheet of AD9684 ,the Table 4 shows that the range of Tskewf is from 850ps to 1100ps ,opreating in maximum sampling rate,which is 500Msps and its sampling period is 2ns.
But in the figure 5 of this datasheet ,It shows that the beginning time of Tskewf is Converter 1 data bit swtiching edge and the ending time is dco falling edge.
If the data provided in the Table 4 is right ,meanwhile the starting/ending point in Figure 5 is also right , that means dco falling edge will comes later than Converter 1 data swtiching edge about 1ns(0.85ns~1.1ns exectly).
But the next Converter 0 data comes later then Converter 1 data swtiching edge is also about 1ns!(DDR data ,changing happends in half sampling period)
I want to know what is wrong in this understanding.Or just the starting point of Tskewf is the earlier Converter 0 data bit swtiching edge ,not Converter 1's.
Thanks a lot.