AD9254 SPI port

Question

The manual of AD9254 states that the voltage range of SCLK pin or CSB pin is less than 3.6V, but there is a pull-up resistance in the CSB pin to AVDD, and the voltage of AVDD is 1.8V. In this way, when we use 3.3V SPI interface, if DVDD uses 2.5V and AVDD uses 1.8V, can CSB and SCLK pin directly use 3.3V logic level to access the chip without level conversion? If used directly, 3.3V power will leak to AVDD through pull-up resistance. Does it affect chip performance? . And it says in the manual that if SPI is not used, the CSB pin should be pulled up to AVDD.

PeeveeS · Accepted Answer

Hi joshxu, 
 joshxu said: can we connect 3.3V SPI signal directly to CSB pin and SCLK pin 
 Yes, it is safe. The AVDD pull up with 26k you see in the equivalent circuit serves as a weak pull up to keep the CSB high, in case there is no input to the pin. I still recommend using a level shifter for the SPI lines, since the SDIO pin will be limited up to DRVDD + 0.3. Best regards, Peevee)

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AD9254 SPI port