We have a few questions about the phase noise and aperture jitter in the AD9081.
Our questions below relate to the AD9081 data sheet Rev. 0.
1. How are the tones in figures 26-28 generated?
Are they generated via ADC input or via internal DDS?
2. How is the aperture jitter listed in Table 8 disambiguated from broadband PLL jitter?
It would seem to me that if an SNR degradation method were used, one could not perform such a disambiguation and that this aperture jitter number must necessarily include broadband PLL jitter.
Over what bandwidth is this SNR degradation method used?
3. How were figures 26-28 measured? Were they measured with a spectrum analyzer or a phase noise analyzer?
4. Is Fig. 26 with the clock PLL enabled or disabled?
5. Fig. 26 seems to indicate the presence of a thermal noise floor unrelated to clock phase noise at -165dBc/Hz, where fout=0MHz.
Is this noise floor also present in the measurement of Figs. 27 and 28?
6. What output power level in dBFS was used to generate Fig. 26-28?
7. Would the curve for Fig. 24 look the same if a -3dBFS digital backoff signal were used for the output?
Thanks in advance for any help you can provide!