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ad9094 testing digital interface using pn-short and ramp modes

Category: Hardware
Product Number: ad9094

We have built a capture board similar to the LIDAR EVM, using an AD9094 connected to a Xilinx zynqmp FPGA SOC.

Got everything setup and working it seems, I can view the data using the IIO osciloscope for example.

To thoroughly test the digital interface, I worte a C++ program that uses libiio to put the chip in test mode (ramp, checkerboard, pn-short, etc.) and then verifies the data it receives.

I wanted to use the pn-short mode to veriify this, but I cannot find much information on what this sequence entails. The datasheet ( appears to have copied this from a 14-bit ADC. I'm mostly interested in the length of the sequence...

So to at least make some progress, I set it to "ramp" mode instead. This outputs 8-bit "counters" on all four channels, which almost - but not quite - works.

When I analyze the data, simply testing that each "sample[i] == sample[i - 4]" (4 channels, one byte per channel) I get some strange fails, where the ramp "skips". I would normally think an underrun has occured and some data lost, but that would cause the fail on all channels at the same time. Instead, the channels occasionally "skip" a bit. The skips are usually at the exact same location in each frame captured.

As common good practice with ADCs, I always capture 8 or so frames and throw them away before starting the real analysis. The "frame" size is usually 8k samples.

So two questions about the AD9094:

- What is the PN sequence it really generates?

- Does the "ramp" function really count continuously or are these 'skips' something that's built-in?