I previously designed with AD9652-310. In the next design, the AD9690-500 is considered as an alternative to change the LVDS interface of this AD9652-310 to JESD204B.
We previously received an RF input of 100 MHz bandwidth with 180 MHz as the center and the sampling rate was approximately 250 MSPS.
However, the datasheet of AD9690 indicates that the minimum sampling clock is 300MSPS. So I wonder if it is possible to receive 500MHz and sample at 250MSPS using the internal divider? Or is it not possible to use the same sample rate (about 250MSPS) as the existing device ?
In other words, I am looking for a device that has the JESD204B interface and is most similar to the AD9652 in performance. And I am looking for an ADC that can use the same sample rate (250MSPS) and bandwidth of 125-235 MHz as an analog input so that the existing design can be reused. If AD9690 cannot be a replacement, can you recommend me another best device?