Post Go back to editing

AD9695 Datasheet test setup

Category: Datasheet/Specs
Product Number: AD9695-1300EBZ
Software Version: ACE

Hello,

I am capturing data from an AD9695-1300EBZ onto an ADS8-V1 data capture board. I am running the ADC in full-bandwidth mode.

I am using HP ESG-4000A signal generator to generate:

1. An analog input signal of 500MHz and amplitude of 10dBm

2. A reference clock of 325MHz and amplitude of 10dBm, fed into the ADS8-V1

3. A sampling clock of 1.3GHz and amplitude of 10dBm.

The results of my FFT are:

Noise/Hz: -145 dBFS/Hz

SNR: 51.096 dB

SNR FS: 57.274 dB

SFDR: 41.25 dB

THD: -45.63 dBFS

SINAD: 39.166 dB

My questions are: 

1. According to the datasheet, I should be getting a SINAD of around 67.5 dB or 10.5 bits of ENOB. Is the downgrade in performance due to my clock sources?

2. I notice the application note AN-835 talks about using the AD9516-0, but that was for the HSC-ADC-EVALC setup. Were the AD9695 performance tests in the datasheet performed similarly? What was the exact clocking setup for the AD9695 to get the performance seen in the datasheet?

Top Replies

Parents
  • Hi enginoob,

    Here are my comments based on your current configuration:

    1. According to the datasheet, I should be getting a SINAD of around 67.5 dB or 10.5 bits of ENOB. Is the downgrade in performance due to my clock sources?

    I checked the datasheet for the signal generator you used and the phase noise seems acceptable. 

    2. I notice the application note AN-835 talks about using the AD9516-0, but that was for the HSC-ADC-EVALC setup. Were the AD9695 performance tests in the datasheet performed similarly? What was the exact clocking setup for the AD9695 to get the performance seen in the datasheet?

    It is not necessary to use the AD9516-0, the article recommends this device when you need a customized clocking.

    For now, let's try to improve your analog input setup.

    1. Please see this guide to get the general idea on proper sequence for testing AD9695: EVALUATING THE AD9695/AD9697 ANALOG-TO-DIGITAL CONVERTER [Analog Devices Wiki]
    2. Take note that you must keep the fundamental amplitude at -1dBFS. See image below from the user guide as an example.



    You can also check the test conditions stated on the datasheet for more details.

    See if this improves your test results. 

    If you can provide a BPF or a LPF, this would also improve the results. Try with only BPF at first and see the results.


    Best regards,
    jsalenga


  • Thanks for the help, jsalenga!

    I added two LPFs to the analog input and that bumped my SINAD up to 56dB. Thanks!

    1. That's still quite far away from the 67dB that I expected. Is there anything else you recommend?

    2. What was the exact clock source that was used for the AD9695 testing? I would like to replicate it for good performance in my design. The AN-535 document talks about using a Wenzel product, but it doesn't go into what specific product was used for the AD9695.

    3. Also, I think I am having trouble understanding the Ain = -1dBFS. I could get the fundamental power to be -1dBFS like in the figure below by cranking my analog input amplitude up to 14.50dBm. However, assuming I have an input impedance of 50ohms, shouldn't this translate to 3.3Vpp? I thought the input range of the AD9695 was up to 2.04Vpp. 

  • Hi enginoob,


    I added two LPFs to the analog input and that bumped my SINAD up to 56dB. Thanks!

    That's good to hear.

    1. That's still quite far away from the 67dB that I expected. Is there anything else you recommend?

    You could also check the configuration of the registers. You can see the details from the datasheet about the test conditions used and compare to your current setup.

    2. What was the exact clock source that was used for the AD9695 testing? I would like to replicate it for good performance in my design. The AN-535 document talks about using a Wenzel product, but it doesn't go into what specific product was used for the AD9695.

    I tried your setup but without the BPF since I don't have one at the moment. I used R&S SMA100B (better performance compared to SMA100A) for the AIN and SMA100A for the Clock sources. IF= 500.3MHz at 1.3Msps, Full BW mode







    Just as an experiment to show the possible effect of the signal source used, I switched SMA100B to Clock and SMA100A to AIN.


    3. Also, I think I am having trouble understanding the Ain = -1dBFS. I could get the fundamental power to be -1dBFS like in the figure below by cranking my analog input amplitude up to 14.50dBm. However, assuming I have an input impedance of 50ohms, shouldn't this translate to 3.3Vpp? I thought the input range of the AD9695 was up to 2.04Vpp. 

    Check this article from Umesh as to why you need to increase the input power to keep -1dBFS signal at the ADC.
    Who Ate My dBs? | Analog Devices



    Best regards,
    Peevee (jsalenga)
Reply
  • Hi enginoob,


    I added two LPFs to the analog input and that bumped my SINAD up to 56dB. Thanks!

    That's good to hear.

    1. That's still quite far away from the 67dB that I expected. Is there anything else you recommend?

    You could also check the configuration of the registers. You can see the details from the datasheet about the test conditions used and compare to your current setup.

    2. What was the exact clock source that was used for the AD9695 testing? I would like to replicate it for good performance in my design. The AN-535 document talks about using a Wenzel product, but it doesn't go into what specific product was used for the AD9695.

    I tried your setup but without the BPF since I don't have one at the moment. I used R&S SMA100B (better performance compared to SMA100A) for the AIN and SMA100A for the Clock sources. IF= 500.3MHz at 1.3Msps, Full BW mode







    Just as an experiment to show the possible effect of the signal source used, I switched SMA100B to Clock and SMA100A to AIN.


    3. Also, I think I am having trouble understanding the Ain = -1dBFS. I could get the fundamental power to be -1dBFS like in the figure below by cranking my analog input amplitude up to 14.50dBm. However, assuming I have an input impedance of 50ohms, shouldn't this translate to 3.3Vpp? I thought the input range of the AD9695 was up to 2.04Vpp. 

    Check this article from Umesh as to why you need to increase the input power to keep -1dBFS signal at the ADC.
    Who Ate My dBs? | Analog Devices



    Best regards,
    Peevee (jsalenga)
Children
  • Peevee,

    Thank you SOOOO much. This helps immensely!!

  • Hi Peevee, 

    I am conducting test on AD7091r-4 using it's evaluation board. I am giving input using function generator of sigilent SDG6052X having 16 bit resolution. I have used external input filter or RC, R= 160ohms and C = 10nF for cutoff frequency of 100KHz to suppress the third harmonic of 300KHz. I am getting good snr of 69 close to 70 claimed by data sheet. But I m unable to get good THD,ENOB,SINAD and SFDR. The ThD as per data sheet is -84 but I am getting around 70 for 10KHz and sometimes less for 100KHz input

    Can u recommend the changes other than changing signal source like using any filter or any other change .? 

  • Hi Rabbs,

    I saw that you posted your concern here: (+) Ad7091r testing using evaluation board - Q&A - Precision ADCs - EngineerZone (analog.com)

    Please continue using that thread as they can support you better forAD7091R-4

    Thank you.

    Best regards,
    Peevee

  • Hi Peevee,

    Actually noone replied there, I did asked but was not getting replies. If u can generally help me with the filter thing irrespective of the board. 

    Like what value of R and C u usually recommend for input filter if we are interested in 100KHz of frequency. I did used 100KHz cutoff frequency and used R = 160Ohms and C = 10nF but it caused higher distortion and Greater 3rd harmonic although SNR has improved but THD got worse. So when I use the filter cut-off frequency close to the frequency of interest that is 100KHz, SNR gets better but higher distortion but when I use cuttoff frequency 6 or 10 times of fundamental frequency i.e 100KHz the distortion becomes less as THD improves but SNR is little bit reduced like from 69dB to 67dB.

  • Hi Rabbs,

    The THD you are getting may be coming from the SDG6052X. You will need to get a better signal source for this.
    From their datasheet, the THD you are getting at around 70dB or less is close to this.


    It's difficult to see the actual performance of the ADC. It's is best to use a signal generator with a much better performance compared to the ADC. Here's the THD from AP2700 datasheet



    You can verify the SDG6052X output using a spectrum analyzer to have a reference and to see if this is the case.

    I hope this helps.

    Best regards,
    Peevee


  • Hello peevee

    Can you please guide me how to perform INL and DNL test on ADC using equipment. Means what equipment is required and when we get waveform what we need to put into formula or what formula do we use or what parameters do we see in INL and DNL. 

    Second thing is in channel to channel isolation of ADC the value is given in dB in most of ADC data sheets . So what this dB value represents? Like voltage or what because it has no units so does it represents snr SFDR or anything similar? 

    Please guide me w.r.t general testing of ADC. 

    Thanks 

  • Hi Rabbs,

    I highly suggest you open a different thread for your concerns. This is to ensure that the other EngineerZone members with similar concerns can easily see.

    Best regards,
    Peevee