LTC2107 clock input power

Question

Hello, 
 I am designing a board with the LTC2107 designed to be used for 30 to 90 MHz. 
 I think ill clock it with a 200MHz LVDS osc with 150fS of RMS jitter. 
 My question is how much will it 0.4Vptp ouput drive voltage hurt performance and should i amplify it somehow? 
 If i should inedeed amplify it, in what manner/ with what sort of IC should i use? 
 
 thanks :)

FormerMember · Accepted Answer

Hi, 
 For optimum SNR performance, data sheet recommends to source 2Vp-p differential encode signal. The clock jitter is the most important parameter in designing a good clock circuit as this can potentially limit the SNR of your ADC. Hence, it is important to consider the clock source and associated circuitry to reduce jitter. I haven't encountered an amplifier in any of our clock circuitry; this can also be a potential source of additive jitter hence I cannot recommend one. 
 But there's a recommended article that might help you in designing your clock system Analog-to-Digital Converter Clock Optimization: A Test Engineering Perspective | Analog Devices . Page 20 of the datasheet also describe details in designing LTC2107 clock input. 
 Regards, 
 Meriam)

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LTC2107 clock input power