Dear support,
I need to interface the LTC6947 PLL REFin with the LTC6954 Clock Divider output. In particular, the LTC6954 provides for a 100MHz REFERENCE signal for the LTC6947.
Since LTC6954 can provide 3 different format for the output signal, the question is which is the best choice for the format of the LTC6947 reference signal in order to maximize the PLL noise performance CMOS, LVDS or LVPECL?
And, could you provide the suggested interface schematic for the best solution?
Thank you for your reply.
