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AD9670/9674 - individual channel power-down

Dear Analog team,

I would like to have additional information about the individual channel power-down feature on the AD9670 and AD9674 components.

The datasheets indicate that bit 0 in register 0x022 (SERIAL_CH_STAT) controls channel power-down. Do you confirm that '0' deactivates power-down (i.e. channel is active) and '1' enables power-down?
Also: how can I set this paramter for the 8 channels of the ADC? Is this setting simply applied to the channels that are 'on' in registers 0x004 and 0x005?
If so, is it problematic if "clock channel DCO" and FCO are active in register 0x005?

Thanks in advance for your answers.

Kind regards,