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AD9652 clock filter


I saw the circuit below in AD-FMCOMMS6-EBZ schematic, which is the Evaluation board of the AD9652.

Each lowpass filter is placed on the differential line of the LVPECL signal. I suspect this may have been used to remove the hormonic component in the LVPECL signal.

1. What is the purpose of this filter?
2. When using this filter, the LVPECL will have 1dB attenuation. Does this attenuation affect ADC performance?
3. If this filter is used to remove the harmonics of the clock, I would like to know how the harmonics affect the ADC performance.


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[edited by: seung-gon at 12:37 PM (GMT -5) on 26 Jan 2022]
  • Hello,

    You are correct in that its purpose is to remove the higher order harmonics of the LVPECL.  Note that this also reduces the "slew rate" of the clock signal which is important since the ADC's clock receivers jitter performance is slew rate dependent.  Hence......the use of the clock filter should only be considered in cases where the harmonics of the ADC clock can spread to other sensitive sections of the system and cause spurious issues (i.e. LO or single-ended input of a RF mixer, ext).  


  • Thank you for your answer.

    I have one more question.

    Why are the 33ohm termination resistors used in the front stage of the LF filters? 

    If I use LF filters for the LVPECL signal as shown in the picture, does that 33ohm terminating resistor have to be used as well?


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