Hello All,
I'm using LTC2274 ADC in our custom board. I've below queries to understand the chip specification.
I read in the datasheet that the SFDR specification is 100dB under certain conditions (Input Frequency, PGA setting). We can test this specification by choosing the proper FFT length so that peak noise power of the FFT spectrum much lower than -100dBFs. We may able to clearly see the spurious generated by the chip if we keep the peak noise power of the FFT spectrum around -120dBFs.
Kindly refer the typical performance characteristics figure no 2274 G04. I understood that the sampling rate is 105MHz, 128K point FFT and the input frequency is 4.93MHz with -1dBFs input power level. So the frequency resolution (RBW) is 801.08Hz. I'm able to clearly see the peak spurious power level is less than -100dBFs. So the SFDR specification given in the datasheet met with the performance. Here is my doubt.
Question 1 : Can we see the input signal in the FFT spectrum if we feed -100dBFs input to the ADC? Note, FFT length and input frequency is remain same.
Question 2 : Consider that the input signal should be 5dB higher than the maximum spurious level in the spectrum for the sensitivity definition. Hence, I may be able to get -95dBFs as sensitivity with 95dB dynamic range with 0dBFs to -95dBFs. Am I correct with the assumption?
Question 3 : Assume proper FFT length and no. of bit chosen to see better than 120dB dynamic range. Does this chip digitize signal below -90dBFs or -96dBFs or even -100dBFs input signal.
Question 4 : What is the ENOB of this ADC?
Kindly provide the feedback at the earliest to finalize the system level gain requirements. Thanks in advance.
Regards
Loganathan N
