EVAL-AD9286-500EBZ Test Pattern Validation

Hi Team,

We are using AD9286-500EBZ Evaluation kit integrated with Zynq Ultrascale+ MPSoC.

We are able to establish the SPI communication with ADC. Now we are trying to validate the test pattern feature provided by the ADC to validate our capture logic.

I have programmed the ADC to output 0/1 word toggling and I am able to see the 16 bit data as 0x0000 and 0xFFFF most of the time. But sometimes I am observing byte toggling as 0x00FF and 0xFF00. Same observation is seen in checker board pattern as well. I am supposed to observe 0xaaaa and 0x5555 on the data lines. But sometimes we are observing 0xaa55 and 0x55aa sometimes.
We also observed that, the values are consistent throughout once pattern is received and will not change. i.e. once 0xFFFF and 0x0000 is received there will be no byte toggling observed until I turn off the board and do the rerun. Please find the attached ILA snapshots captured in FPGA for your reference.

I request you to provide your inputs on why we are observing byte toggling.
Thank you in advance.

With regards,

  • Hi Thejashree,

    The AD9286 is an 8-bit ADC, hence I believe the inconsistent data capture has something to do with the framing. In AN-877, there's a footnote for Word 1 & Word 2: Truncated from the right for lower resolutions. Can you check using 8-bit frame if this would address the problem?