Post Go back to editing

Sample clock for AD9213 and 9172 on Hitech Global board

Hi,

I want to use VCU128 FPGA Evaluation Kit for capturing the data from AD9213 and transmitting data to AD9172 (part number: HTG-FMC-12ADC-16DAC). However, I can't find the input sample clock ports for both AD9213 and 9172 on the HTG board. I thought that there is a internal PLL on AD9213 but I couldn't find where to configure the sample clock in the datasheet of AD9213 and HTG only supports the schematic of their board so I'm very confused now. Could you give me some advice on my problem? thank you so much.

Here is the block diagram of HTG board.

Parents
  • Hi, it's not clear whether you found the answer to your question. This hi-tech global board block diagram is incomplete. There is another clock gen IC on the board, the adf4371. So, the HMC7044 generates the ref clocks for FPGA JESD204B tranceivers, the DAC, and the ADF4371 sample clock synthesizer. You set up the HMC7044 to generate the ref clock, then set up the ADF4371 to generate the ADC sample clock (8-10 GHz or so), and then set up the ADC to get its PLL to lock.

Reply
  • Hi, it's not clear whether you found the answer to your question. This hi-tech global board block diagram is incomplete. There is another clock gen IC on the board, the adf4371. So, the HMC7044 generates the ref clocks for FPGA JESD204B tranceivers, the DAC, and the ADF4371 sample clock synthesizer. You set up the HMC7044 to generate the ref clock, then set up the ADF4371 to generate the ADC sample clock (8-10 GHz or so), and then set up the ADC to get its PLL to lock.

Children
No Data