SPI controller chip ID wrong

Hello support team,

  I am working with AD9681 - HSC-EVALEZ. Everything ran normally before sudden stop. And I think the problem is the below image. I check the USB still connected to PC. 

Please kindly help me.

Thank you,

HOANG.

   

Parents
  • Hello technical support team,

    Please care about my problem.

    I would like to try all ways in software domain before confirming the problem caused by the hardware.

    Then I would like to send it to the company and  buy the new one. 

    Thank you very much,

    HOANG

  • 0
    •  Analog Employees 
    on Oct 15, 2021 9:46 AM in reply to MDHOANG

    Hi Hoang,

    Based from the discussion, I believe that the SPI Controller and VA software is not causing the problem as it was verified working using AD9637 + EVALCZ. Hence, I would like to check closely on the integrity of the boards.

    1. Could you check if there is enough supply levels on the DUT pins?

    2. Can you probe the SPI lines (CSB, SCLK, SDIO) if appropriate digital levels and inputs were transmitted to the device.

    Regards,

    Meriam

Reply
  • 0
    •  Analog Employees 
    on Oct 15, 2021 9:46 AM in reply to MDHOANG

    Hi Hoang,

    Based from the discussion, I believe that the SPI Controller and VA software is not causing the problem as it was verified working using AD9637 + EVALCZ. Hence, I would like to check closely on the integrity of the boards.

    1. Could you check if there is enough supply levels on the DUT pins?

    2. Can you probe the SPI lines (CSB, SCLK, SDIO) if appropriate digital levels and inputs were transmitted to the device.

    Regards,

    Meriam

Children
  • Hello Meriam,

    I probe every PIN as you recommended (J202- 3,5)(P1- 2,5,8,11). It seems not thing at those pins.

    All pin show like this image. 

    One more little question.

    II want to work with 4 external SMA at EVALEZ board. But when I saw in the schematic (rev D). There are some thing not correct at PIN IO (EXT1,2). Could I use J203 J204 as the general IO. Please inform the correct schematic version. 

    Regard,

    HOANG

  • 0
    •  Analog Employees 
    on Oct 19, 2021 9:20 AM in reply to MDHOANG

    Hi Hoang,

    It seems that you didn't have digital stimulus going to DUT hence the board wasn't able to be recognized. When you probe those pins, did you still connect the jumpers as stated in the wiki page guide? Connect Pin 1 to Pin 2 for SDIO, Pin 4 to Pin 5 for SCLK, Pin 8 to Pin 9 for CSB1 and Pin 11 to Pin 12 for CSB2. This is important since your digital inputs are coming from the FPGA going to the DUT i.e P1-1 (FPGA_SDIO) to P1_2 (SDIO_DUT) connection.

    The J202 header is the selection of Vref. Whatever option you choose, you must measure 1V.

    The EVALEZ schematic version I have is revF. May I know what's the rev indicated in the board that you're using?

    Regards,

    Meriam

  • Hello Meriam,

    Sorry for my weak skill. I check it again with all the default setting jumper in ADC board.

    At J202: nothing.

    At P1: 11-12 : 2V              8-9 : 2V             4-5: nothing                    1-2: nothing. 

    There is a product code on my evalez board: hadv6fmc01d. It matchs with the schematic. 

    May be my HDL code version I am using is an old version (ad9681_evalez_src_08.03.20).

    Could you explain to me this question: If I want to use J203 & J204 (SMA3,SMA4) of the board, could I use it as the general IO for FPGA chip. Because I didn't see any information in the user guides about J203 & J204. If the answer is yes, is there any examination about the time difference going to FPGA chip of twin signal (one go to ADC board and one directly go to evalez via J203).

    Regards,

    HOANG