In our custom designed board, we have digitizer boards based on AD9467 interfacing to FPGA. Many of the boards work correctly. But many of the boards doesn't work for the AD9467 normal operation. We verified that Data samples from AD9467 device are being captured correctly inside the FPGA by running ADC into Test Modes of Checkerboard and One/Zero Word Toggle. We don't see any setup/hold violations happening. But on the failing boards, we observed that when ADC is switched to normal operation mode, the captured output waveform is distorted as if comparators inside the ADC are not working correctly to provide the correct output digital code. e.g. in the attached waveform capture named ADC_CHA_1000mVpp_1MHz_Analog_Plot_2_Bit9_Incorrect.jpg , we see that Bit 9 data is in correct.
In the attached file ADC_CHA_1000mVpp_1MHz_Analog_Plot_2_Bit9_Incorrect.jpg, for initial 220 samples I modified the ADC samples using following equation in order to focus on ADC data output bit position 9.
for i = 133:220
dout(i) = dout(i)+ 512;
for i = 7:100
dout(i) = dout9i) - 512;
The Red color is the modified waveform overlapped with the original waveform (captured from failing board) in blue color.
Your urgent supported is greatly appreciated in order to solve the problem.
[edited by: Kuldip at 11:50 PM (GMT -4) on 17 Aug 2021]