AD9208 PN checker.

I'm using the Xilinx JESD204C core to receive data from an AD9208 ADC.

In the FPGA, 8 ADC samples will be output in parallel every clock cycle at a 325MHz.

Has anyone designed a PN checker that operates on the parallel output data?


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  • Thanks Judy. My interest is more in checking the PN data received from the AD9208.

    I've since found that the Xilinx JESD204C IP has an internal PN data checker which should be compatible with the sequence produced by the AD9208.

    I'm wondering if anyone has experience using the Xilinx IP for PN checking or has coded a PN checker for the parallel output data from the Xilinx IP.

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