AD9213 MCS Accuracy

The datasheet describes that the synchronization accuracy of the chip is 1 sampling period .

Is it ±1 on many chips?

If so,one chip synchronized within one sampling period before a sampling clock edge, and the other synchronized chip is synchronized within one sampling period after a sampling clock edge, so the difference between them is two sampling periods .

Is my understanding wrong ?

  • 0
    •  Analog Employees 
    on Jul 1, 2021 10:22 PM

    Hi Jamey,

    In the scenario you mention it would make sense that the difference between two AD9213 would be up to two sample clock periods.

    But, the way the AD9213 is designed is that the local (internal) SYSREFs are aligned to within 1 sample clock period after the sampling edge, so the alignment of two AD9213s using MCS is within one sample clock period.

    Thank you.

    Doug