Due to the occasional abnormal operation when the AD9648 is powered on, the circuit has been changed to a circuit that applies the power of AVDD and DRVDD separately.
So, after AVDD is applied first, after clock is stabilized, DRVDD power is applied to perform soft reset.
However, I measured DRVDD with only AVDD applied, and I got the result as shown in the figure below.
Before applying DRVDD, can you see the reason for the abnormal voltage as shown in the picture above?
Also, please advise if measuring abnormal voltage before applying DRVDD voltage could affect the operation of AD9648.