AD9680 encode clock latency

Greetings,

in the AD9680 datasheet page 84 chapter Latency there is a nice discussion of the latency. Yet it is defined in units of "encode clocks". This "encode clocks" is not defined anywhere in the datasheet. Is it:
a) the ADC sampling rate clock
b) the clock provided to the chip before it is divided (1/2/4/8 divider) to make the ADC sampling rate clock
c) any other clock (if yes, what, how it is constructed)
?

Thank you in advance for an answer

- Jiri

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