Per channel Sampling rate of AD7606C-18 and possibility of two-ADC setup for 16-channel simultaneous sampling?


My purpose is to measure 16 different 'one-shot' (single) pulses from 16 different wires, hence the requirement of a 16-channel simultaneous ADC. I want to use two AD7606C-18 to simultaneously sample 16 channels (8 each), so my questions are:

1. The datasheet says at high bandwidth mode: 220kHz per channel. I am a bit confused here, is it the sampling rate per channel or is it the highest frequency that can be sampled per channel? What is the smallest pulse width I can measure (both theoretically and practically) with this ADC simultaneously on all 8 channels?

2. There is a document (CN0148) describing connecting two AD7606 to an FPGA, to increase the channel count from 8 to 16. It is also valid for AD7606C-18? Do I need any small/big changes?

Thank you. 



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[edited by: Lluis at 10:43 AM (GMT -5) on 8 Jan 2021]
  • +1
    •  Analog Employees 
    on Jan 8, 2021 10:42 AM

    Hi Paul,

    The high bandwidth mode enables for faster settling agains step response, if that´s what you are loooking for. See figures 63 through 68 on the datasheet for details.

    This mode has a penalty on noise perfomance if that´s ok, see figures like FFTs, SNRs and page 30 for more details.

    CN0148 should still be applicable because they newer device can be used as pin replacement. One major point to take into account is the fact that AD7606C-18 has a memory map, so you need to provide access to SDI (serial) or RD (parallel) pin. See this app note about migrating from AD7606 to AD7606B, it´s also applicable to AD7606C AN-1559 (Rev. 0) (analog.com)

    Regards,

    Lluis.

  • Hello Lluis,

    Thank you for clearing things up. One thing I still do not understand is the sampling frequency per channel. Is it 1MSPS/8 = 125KSPS (sampling time of 8us) per channel? which would mean I could only sample the smallest pulse of width 16us?

    Regards,
    Shubham Paul

  • 0
    •  Analog Employees 
    on Jan 8, 2021 11:47 AM in reply to paulplusx

    Hi Shubham Paul,

    No, this is a simultaneous sampling ADC, 8SAR ADCs on chip, so all of them sample at 1MSPS.

    Thanks,

    Lluis.

  • Hi Lluis,

    Thanks for the quick response. Just to confirm, so does this mean I could sample eight different pulses of a minimum width of 2us (for each pulse) simultaneously on all the channels?

    Regards
    Shubham Paul

  • 0
    •  Analog Employees 
    on Jan 8, 2021 4:25 PM in reply to paulplusx

    Hi Shubham Paul,

    Well, what info are you trying to extract? Just detecting the pulses? What voltage amplitude are these?

    Note that internally there is a LPF, and you can find the frequency and phase response on figures 79 and 80.

    As a matter of pen-and-paper exercise, if you create a simple 1st order LPF, with a similar cutoff frequency, you would see 10dB+ attenuation at 500kHz, see below what you´d see at the filters output. This is a theroteical exercise, a filter response. In addition you´d have to take into account the actual settling time mentioned before (figure 63), and that you are sampling just to 1MHz.

    Regards,

    Lluis.