According to table.8 in the datasheet, span_factor is set by MODE2 pin voltage.
what are voltage allowance for 1/3A VDD and 2/3 AVDD?
when is span_factor and resulting differential span is fixed?
the tolerance on this should match the AVDD tolerance.
when is MODE2 pin vaoltage latched to fix span_factor and power scaling? AVDD power up?
or ls NOT MODE2 voltage latched?