AD9249
Recommended for New Designs
The AD9249 is a 16-channel, 14-bit, 65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit that is designed for low cost, low...
Datasheet
AD9249 on Analog.com
Hello everyone,
for my project I am using the board AD9249-65EBZ with an FMC connector. The 14-bit LVDS data is supposed to be sent to a Xilinx Zynq 7000 ZC702.
Having a look on the reference designs from Xilinx, this is not a straight forward task, so I wonder whether you at ADI have a FPGA reference design which can deserialize the data?
From what I got from the Xilinx documents, this is best done using ISERDESE2.
Thank you in advance
Hi Smallredpandabear,
Thank you for using AD9249. In our evaluation setup we capture AD9249 outputs using the HSC-ADC-EVALEZ FPGA board. I'll request that sample FPGA code we use on the HSC-ADC-EVALEZ be sent to you.
Thank you.
Doug
Hi Smallredpandabear,
Thank you for using AD9249. In our evaluation setup we capture AD9249 outputs using the HSC-ADC-EVALEZ FPGA board. I'll request that sample FPGA code we use on the HSC-ADC-EVALEZ be sent to you.
Thank you.
Doug
Hi! Dougl:
I am going to work on a new project where AD9249 is used for data capture and the data are fed to Xilinx's KC705. Would you please send me a copy of the reference design of the FPGA project. I am using Vivado but if the project is for ISE that's also OK for me. Thank you for the support!
CapserC
Hi Dougl,
thank you for your help. I received the sample code.
Best regards
Hi Dougl,
in the data capture specification it is said that "the 9681 data capture specification" contains information on how data capture is performed with the FPGA and VA. Is it possible for you also to send me the file containing this piece of information.
Thank you
Hi CasperC,
My colleague requested that the sample code be sent to you. You should receive it soon, if you have not already.
Thank you.
Doug
Hi,
The AD9681 capture specification has been emailed to you.
Thanks,
Doug
Hi, Dougl.
I have a similar situation. Data from the AD9249 must be transferred to the Xilinx ML-605. I would be grateful for the sample FPGA code. I am using ISE.
Thank you for the support!
Hi,
I'm sorry about the slow reply. I responded in your other post.
Thanks for your interest in AD9249.
Doug