for my project I am using the board AD9249-65EBZ with an FMC connector. The 14-bit LVDS data is supposed to be sent to a Xilinx Zynq 7000 ZC702.
Having a look on the reference designs from Xilinx, this is not a straight forward task, so I wonder whether you at ADI have a FPGA reference design which can deserialize the data?
From what I got from the Xilinx documents, this is best done using ISERDESE2.
Thank you in advance