we are planning on integrating a couple (8) of AD9675 ADC converters in our design. The JESD204b IP block we'll be using from Xilinx, yet for the phy and data link layer,
Is it correct to state that we can use the AXI_AD9671 Ip core of AD, as both chips have a lot in common, for the transport-layer?
Are the main differences in approaching the ICs (from a digital design point of view) mostly the SPI interfacing? (apart from of course the inherent different analog options).