I like this ADC because of the high sample rate and good dynamic performance. I'm really only processing 20MHz of bandwidth. I am thinking that I should be able to pick a sample rate and analog input frequency range to position the largest harmonics out-of-band. I have flexibility on input freq. range, clock rate - my main goal is to do a very robust design with lowest noise/distortion in my 20MHz band. I am also trying to avoid a complex = expensive or hard to manufacture filter before the ADC.
Anyone have suggestions? Tools I should use? Other? Thanks... Scott
Choosing a high sample rate converter will definitely aide in reducing the cost and complexity of the anti-aliasing filter (AAF). Next, if possible, choose a 20MHz BW to be within baseband at Fs/4 or greater, this will push the harmonics in to the next Nyquist zone where the AAF will continue to roll-off. Generally at lowpass filter will only be required if this done, keeping the cost down and the complexity and component count low. If a higher 20MHz BW is chosen, >bandbase, then a bandpass filter will be required which will have an increased effect on complexity and component count.
I also attached an application note that discusses some of these AAF tradefoffs.