AD9262 SPI programming

Hi,

I am using AD9262 together with Blackfin ADSP-BF548. The SPI port of the processor is used to connect to the serial configuration port of the ADC. I took the exact circuit used in the AD9262 evaluation board to connect ADC's SDIO/SCLK/CBS to the MISO/MOSI/SCLK/slave select of processor's SPI port. When I tried to read the configuration registers of the ADC, it looks like the ADC is not driving the SDIO at all. I used a scope to probe all the SPI signals. They are all what I expected and consistent with the app note AN-877 diagram. Only problem is the read data phase, where it looks like the ADC does not drive SDIO at all, and the SDIO signal stays the same as whatever is driven by MOSI. Is there any possible reason for this?

I speculated something:

1. The ADC is not working at all. But I examined all the power and clock supplies to AD9262 and everything is fine. And there is DCO output. How can I verify if the ADC is working well and supposed to respond to the SPI register read command?

2. The SPI circuit of AD9262 evaluation board might not be good. During the read data phase, both ADC and processor are driving the MISO, and the processor is driving it through a resistor R3. The value of R3, 1.07K, might be too small and so processor drive strength overrids SDIO of ADC.

Any idea is appreciated!

Here is some more details on my system: the ADC is on my own board and the DSP processor is on ADSP-BF548 EZKIT. The two boards are connected through the extension connector J1, J2 and J3 of the ADSP-BF548 EZKIT.

thank you very much.

Coolparam

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  • 0
    •  Analog Employees 
    on Mar 8, 2012 7:23 PM

    Hello,

    Thanks for clarification. 

    Comments are as follows:

    1)  You will need to debug SPI communication problem.  I would advise you to probe (with o'scope) your SPI control lines (CSB, SCLK, SDIO) and verify that the AD9262 is seeing the SPI timing as well as displying the proper SDIO bit sequence (for given address+data pattern) for a WRITE operation.  For a READ operation, you should verfify with o'scope that device is placing the proper data on the line.

    2) Since you only are using one ADC, you should have selected the AD9261.  That said, using one of the ADC's should be fine while leaving other ADC "unconnected".  Default setting allow operation of both ADC's with each ADC drving data onto their respective data bus.

    3) Since you get a "steady" DCO output now..........your clock input is fine.  Note, for normal operation.....this clock input is going to have to be in the range of 640 MHz +/-5%.

Reply
  • 0
    •  Analog Employees 
    on Mar 8, 2012 7:23 PM

    Hello,

    Thanks for clarification. 

    Comments are as follows:

    1)  You will need to debug SPI communication problem.  I would advise you to probe (with o'scope) your SPI control lines (CSB, SCLK, SDIO) and verify that the AD9262 is seeing the SPI timing as well as displying the proper SDIO bit sequence (for given address+data pattern) for a WRITE operation.  For a READ operation, you should verfify with o'scope that device is placing the proper data on the line.

    2) Since you only are using one ADC, you should have selected the AD9261.  That said, using one of the ADC's should be fine while leaving other ADC "unconnected".  Default setting allow operation of both ADC's with each ADC drving data onto their respective data bus.

    3) Since you get a "steady" DCO output now..........your clock input is fine.  Note, for normal operation.....this clock input is going to have to be in the range of 640 MHz +/-5%.

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