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sampling design issue

I would like to sample a noise signal (DC to 6Mhz) and analyse it one time. I found this ADC. -AD9280, which samples at 32MSPS. A Fifo could collect a bunch of samples and then a micro controller could process these samples. I need to collect these samples real time in one block. The processing can happen later (milli seconds later and only one time).

In order to sample a 6MHz signal I need to sample at least 15MSPS.

Is this a good way to proceed with this project?

Also,

I can buy the HSC-ADC-EVALB-DCZ board which has fifos and usb conection to PC for analysis but I cannot buy any of the EV boards for the individual ADC's. The chip above, for example-  AD9280-EB, is not in stock anywhere, along with the EV boards for all the ADC's. How can I test these chips?

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  • Hello,

    The AD9280 is much older ADC thus really is not recommended.  Since you are simply buying an eval board, I would consider a higher resolution ADC like the 12-bit AD9237.  The AD9237 is a monolithic, single 3 V supply, 12-bit, 20/40/65 MSPS Analog to Digital Converter with a high performance sample-and-hold amplifier and voltage reference. The AD9237 uses a multistage differential pipelined architecture with output error correction logic to provide 12-bit accuracy at 20/40/65 MSPS data rates and guarantee no missing codes over the full operating.  Datasheet is on our website.

    I would select the 65 MSPS vesion since this will relax your analog filtering requirements since you may only need a 1st order filter to filter out the high frequency noise that can alias back into your noise bandwidth of DC to 6 MHz.

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  • Hello,

    The AD9280 is much older ADC thus really is not recommended.  Since you are simply buying an eval board, I would consider a higher resolution ADC like the 12-bit AD9237.  The AD9237 is a monolithic, single 3 V supply, 12-bit, 20/40/65 MSPS Analog to Digital Converter with a high performance sample-and-hold amplifier and voltage reference. The AD9237 uses a multistage differential pipelined architecture with output error correction logic to provide 12-bit accuracy at 20/40/65 MSPS data rates and guarantee no missing codes over the full operating.  Datasheet is on our website.

    I would select the 65 MSPS vesion since this will relax your analog filtering requirements since you may only need a 1st order filter to filter out the high frequency noise that can alias back into your noise bandwidth of DC to 6 MHz.

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