AD9218

Hi,

I m designing a new circuit based on AD9218 ADC and BF537 via PPI interface.

I have some questions about the ADC Vref and input range.

     Firstly, i wonder what is the effect of Vref to the input voltage range. My target is sampling 0V to 2V voltage volue by using 2V p-p configuration. Do i   need to use 2V external Vref to be able to work on this range or is it possible to sample 2V with 1,25V internal voltage reference output?

     Secondly, i did not exactly understand offset binary output. Could you please give me some example voltaj output values?

Third, My real input voltage is changing from 4V to 7V peak. I need to decrease this voltage levels to 2V but without using inverting op-amp. Do you have any suggestion a part from voltage diveder?

Regards,

  • 0
    •  Analog Employees 
    on Apr 21, 2012 12:11 AM

    Hi,

    (1) The Analog Input span of the AD9218 is controlled by the state of the DFS/GAIN pin(4). Your desired mode of 2Vp-p Ain span can be obtained as follows:

    DFS/GAIN No Connection (Floating) = 2Vp-p Ain Span with offset binary output coding format.

    DFS/GAIN tied to VREF = 2Vp-p Ain Span with twos complement output coding format.

    The other allowable DFS/GAIN pin modes are detailed in Table 8 of the AD9218 datasheet.

    (2) I have attached a chart showing the relationship between Ain Voltage and Output Coding Formats for a typical 10b ADC.

    (3) Depending on your Ain signal source driver architecture you can typically utilize a simple resistive element Passive T, Bridged T, or Pi Attenuator network to pad your larger analog input signal down to the 2Vp-p full-scale level supported by the ADC. You can find reference schematic examples for these simple passive attenuator networks online using the names referenced above, or several vendors such as Mini-Circuits offer ready-made RF attenuator blocks/Pads.

    Best Regards,

    Tony M

    10b_ADC_Output_Coding.xls
  • Hi Tony,

    Thank you very much.

    I already know DFS/GAIN pin can be used for 2Vp-p selection but my concern is range. +1 to -1 meaning 2V p-p but 2V to 0V is also 2V peak to peak as well and i would like to use this configuration. For example, assume connection of AIN/ to gnd (or 0V) and give AIN to 0V to 2V. What will happen on this situation: AIN - AIN/ = 2V Max and AIN - AIN/ = 0V min. Which Vref shoud be used on this situation (0v to 2V voltage input at AIN while AIN/ equals to 0V at both single ended and differential) and what will be ADC output for 2V input and 0V input? I will use 8 bit of data from the input which bits i should ignore?

    Best regards,

  • 0
    •  Analog Employees 
    on Apr 25, 2012 11:42 PM

    Hi,

    The AD9218 is not optimized for Single-Ended Ain operation therefore for best performance we recommend the Ains be driven differentially as noted in the Analog Input section on datasheet pg 18. That being said I am attaching an example schematic showing how one might configure the AD9218 for a Single-Ended, AC-coupled, 0V to 2V Ain mode of operation. Please note that SFDR and/or SNR might be degraded somewhat in Single-Ended Ain mode. This performance penalty may be offset to your advantage by the fact that you only need to process 8bits of the converters inherent 10b dynamic range. You will want to ignore the (2) LSB bits (D0 & D1) when truncating the 10b output word down to 8bits.

    The Analog inputs of the AD9218 are internally biased to a fixed Common mode of AVDD/3, or ~1.0V. This is also noted in the spec table on d/s pg 3, and in the Ain Equivalent Circuit figure 6. The Ain Voltage to Output Coding for this mode will follow the "Single Ended Input Config" example that I provided in the previous Input/Output coding attachment.

    Please let me know if I can be of any further assistance with your High Speed Data Converter requirements.

    Take care,

    Tony M

    AD9218_SingleEndedAin_example.pdf
  • Hi Tommy,

    Thanks a lot for your support. I dont have enough exprience on High Speed ADC connections. That is why i m advising with much.

    We desided to put both single ended you provided and differential stated in page 18 Figure-43 circuits into the design with option. Real signal voltage range is 0V to 5V and scaling it to 0V to 1V does not seem good. But we will do it. In single ended circuit it will be scaled 0V to 2V which is better. So as far as i understand Vref will be 1.25V and will be driven by VREF_OUT of ADC (i think there is no meaning applying 2V to Vref externally for 0V to 2V input range).

    From the table you provided, i will get positive full scale value (11 1111 1111) for my highest value and midscale value (01 1111 1111/10 0000 0000) for 0V. Negative values will never match. I will ignore two least signeficent bits.

  • 0
    •  Analog Employees 
    on Apr 26, 2012 11:18 PM

    Hi,

    Yes, the built-in AD9218 voltage reference outputs a fixed 1.25V DC level onto the REFOUT Pin 6. Typically, the internal reference is used by strapping Pin 5 (REFINA) and Pin 7 (REFINB) to Pin 6 (REFOUT).

    1Vp-p or 2Vp-p Input span, as well as the choice of offset binary, or twos complement output coding is determined by the state of the DFS/GAIN Pin 4 as detailed in datasheet Table 8.

    You are correct, applying 2V to VREF externally is not a valid operating mode/condition. If you choose not to use the built-in fixed voltage 1.25V REFOUT, you can apply your own external 1.25V +/-5% VREF to REFINA and REFINB to allow for +/-5% adjustment to the full scale range selected by the DFS/GAIN choice listed above, and noted in the Voltage Reference section on datasheet page 19.

    Actually for the single-ended config (using offset binary output format mode) you will get maximum FS (11 1111 1111) for 2.0V, midscale (01 1111 1111/10 0000 0000) for 1V, and minimum (00 0000 0000) for 0V inputs directly at the +Ain per the coding table I provided. Remember the AIN- input is internally biased at 1.0V and the output code reflects the difference in voltage (Ain+) - (Ain-) across the two ADC inputs.

    Take Care,

    Tony M