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AD9070 Obsolete
The AD9070 is a monolithic sampling analog-to-digital converter with an on-chip track-and-hold circuit and ECL digital interfaces. The product operates...
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AD9070 on Analog.com

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"High-Speed" ADC used for single-pulse conversion



		

			

									
					    Postino
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Jan 16, 2014 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Hi guys,
    
 
    I am looking for a low cost ADC for a single conversion on an external trigger (ECL logic). The trigger comes exactly at the peak amplitude of the pulse (pulse-width < 20ns). I have found the AD9070 which is unfortunately an obsolete product. The digital outputs should be TTL (not ECL) but the conversion-start trigger should be ECL, otherwise (if using an ECL to TTL converter) the maximum amplitude is not hit anymore.
    
 
    Input voltage range: 0 to 2.5V or 5V
    
 
    no of bits: 10 or more
    
 
    the speed of the ADC is not really important as we do not need to detect all pulses (only for monitoring purposes).
    
 
    any suggestion is welcome!
    
 
    thx
    
									
			        
		
    

				
						
        

    
    Tags: 
                                            
                 AD9070
                
                                                    
                 High Speed A/D Converters >10 MSPS
                
                                                    
                 Standard High Speed A/D Converters
                
                                
            
    
    
    

		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    
















    
	
    
	
    
					



			








	
	
	
	



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      •  Analog Employees  
      
            
						
                            
            
            				
            
                on Jan 16, 2014 10:07 PM
            
            
					
      
	
      

		
		
      
					
      Hi, 
      
 
      Even our pipeline ADCs have a S/H function at the front end to sample the input (I think this equates to your "freeze" term), and they are triggered by a differential sample clock input.  These inputs are typically not specified as  being logic family compatible, but a differential PECL signal is often used.  If 10 bits of resolution would be sufficient, then I would recommend looking at the AD9608.  
      
 
      www.analog.com/AD9608 
      
 
      Regards, 
      
 
      David
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
						
						
				
				
		
		
      
			
		
      
	
      

      

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													0
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
						
                            
            
            				
            
                on Jan 16, 2014 10:07 PM
            
            
					
      
	
      

		
		
      
					
      Hi, 
      
 
      Even our pipeline ADCs have a S/H function at the front end to sample the input (I think this equates to your "freeze" term), and they are triggered by a differential sample clock input.  These inputs are typically not specified as  being logic family compatible, but a differential PECL signal is often used.  If 10 bits of resolution would be sufficient, then I would recommend looking at the AD9608.  
      
 
      www.analog.com/AD9608 
      
 
      Regards, 
      
 
      David
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
						
						
				
				
		
		
      
			
		
      
	
      

      

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