AD9629 Bist

Dear all,

I am reading the AD9629 datasheet (Rev.0) and there is one point which is not fully clear to me:

at Page 23 there is the BIST description. It is written :

"The BIST sequence runs for 512 cycles and the stops."

and after that:

"At the completion of the BIST, Bit 0 of Register 0x24 is automatically cleared".

Does it means that it will be cleared after 513 cycles after the BIST start?

Or it will wait someone to check that bit by the SPI bus and only after that it will clear the bit?

Regards.

Alberto

  • 0
    •  Analog Employees 
    on Jun 24, 2014 1:47 AM

    Dear Alberto,

    I'm very sorry about the late reply. There is something wrong with our notification system.

    I'll be trying to find out the information for your question.

    I apologize for the delay.

    Doug

  • 0
    •  Analog Employees 
    on Jun 24, 2014 8:27 AM

    Hello again Alberto,

    The statement "At the completion of the BIST, Bit 0 of Register 0x24 is automatically cleared" contains a typo. It is actually Bit[0] of Register 0x0E that is cleared automatically after BIST has completed. I apologize for the error.

    Depending on what you are trying to accomplish, the Output Test Modes (Register 0x0D) might be of value. Using the Output Test Modes, you can put a pseudorandom sequence or other known bit patterns on the outputs. This is useful for checking board interconnect. Please let me know if you would like more information regarding this.

    Thank you.

    Doug