I am reading the AD9629 datasheet (Rev.0) and there is one point which is not fully clear to me:
at Page 23 there is the BIST description. It is written :
"The BIST sequence runs for 512 cycles and the stops."
and after that:
"At the completion of the BIST, Bit 0 of Register 0x24 is automatically cleared".
Does it means that it will be cleared after 513 cycles after the BIST start?
Or it will wait someone to check that bit by the SPI bus and only after that it will clear the bit?