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HSC-ADC-EVALCZ + AD9629-80EBZ + external trigger


we recently purchased a combination of the HSC-ADC-EVALCZ and AD9629-80EBZ evaluation boards.

We would like to start the FIFO acquisition process by external trigger initiation.

Is there any way to make this setup work?

Best regards


  • Hi Michael,

    I've put together some instructions on using the externally triggered capture feature on the AD9629 evaluation board and HSC-ADC-EVALCZ.

    Basically, to perform triggered capture, a new FPGA program needs to be loaded and the trigger signal is applied to SMA1 on HSC-ADC-EVALCZ after the voltage on SMA2 = 2.5V (ready signal).

    The details are contained in the QuickStart Guide. The following link contains the QuickStart guide and the FPGA program file.


    AD9649_29_09_TriggeredCapture_QuickStartGuide_PrA.pdf (Instructions)

    ad9649_fifo5.bin (FPGA program file)

    Please let me know if you have any questions. Thank you for using the AD9629.


  • Hi Doug,

    We're using AD8283 board for our development test and I want to see if we can get the FPGA program file for using the external trigger data. I've seen FPGA files for other ADC boards but I could not find it for AD8283 board.

    is there any way to get that FPGA bin file?



  • Hi Orod,

    I already reached out to the FPGA engr to send me the FPGA bin file.

    However, we could only send the file to you privately according to the engineer because he told us that it can't be posted here publicly. We'll send a follow-up email to you offline.

  • Hi Doug,

    I am working on a demo with an AD8285 ADC board connected to HSC-ADC-EVALCZ.

    I need to syncronize the acquisition with an external trigger. How can I set the FPGA registers for activate the reading of the external trigger on SMA connector?


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