Hello, I'm designing a board with 5 high speed ADCs (AD6643) driven by ADA4930-2 and i'm having some concerns regarding pcb layout and especially ground connections.
I want to isolate as much as possible one ADC chain from the other so I partitioned the ground layer trying to avoid returning currents from different ADCs interfering with each other (depicted in the attached image). There is only one point where analog and digital section are connected (near the power supply connector). Is this correct practice or should I remove the gap beneath every ADC to connect analog and digital sections at these points? (the exposed pad of the ADC belongs to analog section).
Also, I know that differential lines driving the ADC should be symmetric but since I have to use vias and a different layer to "invert" the lines (marked wih a red circle in the image), should I do that near the driver or the receiver?
Any other comments and reviews regarding the design are more than welcome.
It is a bit difficult to discern from the words and pictures exactly how you have the ground planes, but keeping them isolated to avoid returning currents would be a good way to design. A…
Jonathan, thank you for your answer.
If I got it right, you mean instead of using vias and crossover the signals, I should connect the positive output of the differential op. amp to the negative input…
You are correct. You would need to connect the - amplifier output to the + ADC input and vice versa. You could then take care of the inversion in the FPGA or the ADC via the invert bit. It is very…
It is a bit difficult to discern from the words and pictures exactly how you have the ground planes, but keeping them isolated to avoid returning currents would be a good way to design. A 'star-type' ground and power connection provides good isolation as well.
Symmetry is very important in the analog input circuitry. I would not recommend using the structure you have to account for the polarity. I would either use the local channel control to invert the data from the ADC or I would take care of the inversion in the FPGA. I would not introduce vias and crossover the signals even if in different layers. This will introduce asymmetry and possibly other issues with the analog inputs which will result in increased even order distortion (mainly 2nd harmonic).
For reference on layout, I'd suggest taking a look at the attached artwork for the AD6643 evaluation board. It shares the board with the AD9643.